\section{Related Work}\label{sec:relatedwork}
Yao et.al \cite{yao1995scheduling} perform the first theoretical investigation of speed scaling research early in 1995 and later many important theoretical results \cite{bansal2007speed} are  achieved. They are all similar to the simple single core processor power model (see Eq. \eqref{eq:singlecore}), which is fundamental to energy efficient computing using speed scaling. Nevertheless, experiments in \cite{basmadjian2012evaluating} and this work show that directly using the single core model for multicore processors may lead to unacceptable estimation or even incorrect conclusions. This motivate us to develop speed scaling power models for multicore processors.

%Many power models have been developed to study the different workloads and architectures.
Performance Monitoring Counters  (PMC) based power model has been widely investigated\cite{singh2009real, joseph2001run,bircher2012complete,bertran2013systematic}. Such work explores the correlation between processor power and a subset of performance events that can be measured by hardware performance counters. Many PMC based methods are focused on selecting the power sensitive performance events for specific architectures and building regression models between power and performance events. While PMC-based methods capture detailed architecture and workload power characteristics, they require extensive runtime performance profiling to identify dominating performance events and counters. Extensive runtime profiling is undesirable to system users who seek quick power estimations, or software and algorithm designers who need the ability to predict power requirements before running or even implementing software.

Component based power models are well accepted at system and chip levels. These models naturally assume that the total power is the sum of all constituents' power. Nevertheless, Basmadjian et.al \cite{basmadjian2012evaluating} find that the power of a multicore processor is not the sum of the power consumed by each of the active cores. They propose to adjust the summed power for more accurate power estimation for multicore computing. In addition, such method often involves detailed architecture analysis and is not suitable for high level users. 

Power measurement is critical for quantitative power and energy analysis and optimization~\cite{esmaeilzadeh2011looking}. There are largely two ways to measure the power of multicore processors. Early work usually uses external power meters to measure component or system power. PowerPack \cite{ge2010powerpack} is such an example. It uses instrumented meters to measure the CPU, memory and node power. Though applicable to all workloads and hardware architecture, this method is intrusive and doesn't scale to large systems. More recently, architectures such as Intel Sandy Bridge \cite{rotem2012power,demmel2012instrumenting} are facilitated with embedded power meters and the RAPL (Running Average Power Limit) interface \cite{david2010rapl} for runtime measurement.

Power models at micro architecture level can provide detailed power information. For example,  Wattch \cite{brooks2000wattch} (for single core) provides a method to measure the power consumption at hardware-level such as CPU cycles.  McPAT \cite{li2009mcpat} (for multicore or manycore) supports comprehensive design space exploration for multicore and manycore processor configurations ranging from 90nm to 22nm and beyond. Those tools are very helpful for architects, not suitable for  high level software and algorithm designers. Wu et al \cite{wu2013mummi} provides MuMMI (Multiple Metrics Modeling Infrastructure) to facilitate systematic measurement, modeling, and prediction of performance, power and performance-power tradeoffs.

Mobius et al \cite{mobius2014power} have performed a comprehensive survey on approaches to  power estimations of single core and multicore processors, virtual machines, and systems. They compare the features of different methods and analyze PMC based methods. Valentini et al \cite{valentini2013overview} overview energy efficient technologies on cluster. For virtual machines, Takouna et al \cite{takouna2011accurate} present a power model that  uses average frequency and the number of active cores to predict power in virtual environment.

Esmaeilzadeh et al \cite{esmaeilzadeh2012looking} indicate that future applications and system software must explore power optimization and management. Thus,  simple and  easy-to-use power models suitable for high level applications or system software  are critical for energy efficient computing in the future. We hope that our multicore speed scaling power models provide a viable solution and promote research in energy optimization and Pareto analysis for traditional and emerging software.
